Integration of p-type Cr2O3 on Ultra-Wide Bandgap AlGaN PolFETs with 2.5 kV Breakdown Voltage

The 30-second take

• What: The authors put sputtered p-type Cr2O3 on ultra-wide-bandgap AlGaN PolFETs as a P–N heterojunction gate, reporting Rc of 0.56 Ω·mm, VON > 3.5 V, Imax 590 mA/mm, and breakdown above 2.5 kV at 11.2 mΩ·cm² (and up to 5.3 MV/cm on shorter devices).
• Abundance angle: today, high-voltage, high-Al AlGaN transistors with well-behaved gates are an elite wide-bandgap luxury. A low-thermal-budget oxide P–N gate would be a step toward more default RF and power switches if the voltages hold in production (mid-horizon: manufacturing is the gate).
• Who should care: UWBG device labs, power- and RF-electronics teams, and process engineers who cannot afford high-temperature p-type III-nitride gates.

What the paper actually did

The authors demonstrate ultra-wide-bandgap AlGaN polarization-graded field-effect transistors (PolFETs) that use room-temperature-sputtered p-type oxide Cr2O3 as a P–N heterojunction gate, aiming for better lateral-device field management than conventional Schottky gates. Devices with reverse-graded n-AlGaN contact layers reach a record-low contact resistance Rc of 0.56 Ω·mm in their telling.

The Cr2O3 gate shows turn-on VON greater than 3.5 V and a positive threshold shift of +1.63 V versus Schottky gates, which they attribute to stronger channel depletion from the P–N junction. Fabricated devices reach Imax of 590 mA/mm and ION/IOFF of 3×10^7.

They report state-of-the-art breakdown voltage above 2.5 kV with 11.2 mΩ·cm² specific on-resistance (gate–drain length 9.55 μm, average breakdown field above 2.5 MV/cm). Shorter gate–drain devices show breakdown fields up to 5.3 MV/cm at 0.28 mΩ·cm². They present sputtered p-Cr2O3 as a viable, low-thermal-budget P–N junction gate technology for high-Al-composition AlGaN transistors in RF and power electronics.

What makes this disruptive

The scarce capability is a p-type gate on high-Al AlGaN that you can deposit without a brutal thermal budget, while still holding kilovolts. Schottky gates are simpler but weaker at field management; epitaxial p-nitrides are harder.

Room-temperature sputtered Cr2O3 plus a claimed record-low Rc and >2.5 kV / 11.2 mΩ·cm² is a process-plus-device punch. The +1.63 V threshold shift versus Schottky is the depletion signature they want.

These are lab devices. Treat “record-low” and “state-of-the-art” as their comparison class, not a JEDEC qualification.

Why it matters (outside the lab)

Abundance lens: efficient high-voltage switching is still expensive wide-bandgap silicon-carbide and gallium-nitride real estate. If a sputtered oxide P–N gate makes high-Al AlGaN PolFETs easier to build, more of that voltage-and-efficiency luxury can move toward default power and RF parts — if yield and reliability follow.

Near-term, this is a device-demo paper. Medium-term, reliability, uniformity, and independent fabs decide whether Cr2O3 gates become ordinary.

No calendar. One wafer lot does not cheapen the grid.

Limitations & open questions

Preprint device paper; we have not remeasured breakdown or Rc. “Record-low” Rc and “state-of-the-art” VBR are the authors’ claims against their comparison set. Abstract numbers (2.5 kV, 5.3 MV/cm, 0.56 Ω·mm) are from selected device geometries (e.g. LGD = 9.55 μm).

No reliability, dynamic Ron, or high-temperature data are given here. Room-temperature sputtering is low thermal budget, not automatically CMOS-foundry-ready. Schottky comparisons are on their devices.

Abundance is not automatic: a gate oxide stack does not demonetize power electronics.